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rename valueToStore
Signed-off-by: Ivan Butygin <[email protected]>
1 parent f8e528c commit fa96742

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7 files changed

+16
-15
lines changed

7 files changed

+16
-15
lines changed

mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -2012,8 +2012,8 @@ def MemRef_CollapseShapeOp : MemRef_ReassociativeReshapeOp<"collapse_shape", [
20122012
//===----------------------------------------------------------------------===//
20132013

20142014
def MemRef_StoreOp : MemRef_Op<"store",
2015-
[TypesMatchWith<"type of 'value' matches element type of 'base'",
2016-
"base", "value",
2015+
[TypesMatchWith<"type of 'valueToStore' matches element type of 'base'",
2016+
"base", "valueToStore",
20172017
"::llvm::cast<MemRefType>($_self).getElementType()">,
20182018
MemRefsNormalizable,
20192019
DeclareOpInterfaceMethods<AlignmentAttrOpInterface>,
@@ -2048,7 +2048,7 @@ def MemRef_StoreOp : MemRef_Op<"store",
20482048
```
20492049
}];
20502050

2051-
let arguments = (ins AnyType:$value,
2051+
let arguments = (ins AnyType:$valueToStore,
20522052
Arg<AnyMemRef, "the reference to store to",
20532053
[MemWrite]>:$base,
20542054
Variadic<Index>:$indices,
@@ -2075,7 +2075,7 @@ def MemRef_StoreOp : MemRef_Op<"store",
20752075
::mlir::TypedValue<::mlir::MemRefType> getMemref() { return getBase(); }
20762076
::mlir::OpOperand &getMemrefMutable() { return getBaseMutable(); }
20772077

2078-
Value getValueToStore() { return getOperand(0); }
2078+
Value getValue() { return getOperand(0); }
20792079

20802080
Value getMemRef() { return getOperand(1); }
20812081
void setMemRef(Value value) { setOperand(1, value); }
@@ -2088,7 +2088,7 @@ def MemRef_StoreOp : MemRef_Op<"store",
20882088
let hasVerifier = 1;
20892089

20902090
let assemblyFormat = [{
2091-
$value `,` $base `[` $indices `]` attr-dict `:` type($base)
2091+
$valueToStore `,` $base `[` $indices `]` attr-dict `:` type($base)
20922092
}];
20932093
}
20942094

mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -370,7 +370,7 @@ struct ConvertStore final : public OpConversionPattern<memref::StoreOp> {
370370
auto subscript = emitc::SubscriptOp::create(
371371
rewriter, op.getLoc(), arrayValue, operands.getIndices());
372372
rewriter.replaceOpWithNewOp<emitc::AssignOp>(op, subscript,
373-
operands.getValue());
373+
operands.getValueToStore());
374374
return success();
375375
}
376376
};

mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -967,9 +967,9 @@ struct StoreOpLowering : public LoadStoreOpLowering<memref::StoreOp> {
967967
Value dataPtr =
968968
getStridedElementPtr(rewriter, op.getLoc(), type, adaptor.getBase(),
969969
adaptor.getIndices(), kNoWrapFlags);
970-
rewriter.replaceOpWithNewOp<LLVM::StoreOp>(op, adaptor.getValue(), dataPtr,
971-
op.getAlignment().value_or(0),
972-
false, op.getNontemporal());
970+
rewriter.replaceOpWithNewOp<LLVM::StoreOp>(
971+
op, adaptor.getValueToStore(), dataPtr, op.getAlignment().value_or(0),
972+
false, op.getNontemporal());
973973
return success();
974974
}
975975
};

mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -874,7 +874,7 @@ IntStoreOpPattern::matchAndRewrite(memref::StoreOp storeOp, OpAdaptor adaptor,
874874
storeOp, "failed to determine memory requirements");
875875

876876
auto [memoryAccess, alignment] = *memoryRequirements;
877-
Value storeVal = adaptor.getValue();
877+
Value storeVal = adaptor.getValueToStore();
878878
if (isBool)
879879
storeVal = castBoolToIntN(loc, storeVal, dstType, rewriter);
880880
rewriter.replaceOpWithNewOp<spirv::StoreOp>(storeOp, accessChain, storeVal,
@@ -915,7 +915,8 @@ IntStoreOpPattern::matchAndRewrite(memref::StoreOp storeOp, OpAdaptor adaptor,
915915
clearBitsMask =
916916
rewriter.createOrFold<spirv::NotOp>(loc, dstType, clearBitsMask);
917917

918-
Value storeVal = shiftValue(loc, adaptor.getValue(), offset, mask, rewriter);
918+
Value storeVal =
919+
shiftValue(loc, adaptor.getValueToStore(), offset, mask, rewriter);
919920
Value adjustedPtr = adjustAccessChainForBitwidth(typeConverter, accessChainOp,
920921
srcBits, dstBits, rewriter);
921922
std::optional<spirv::Scope> scope = getAtomicOpScope(memrefType);
@@ -1033,7 +1034,7 @@ StoreOpPattern::matchAndRewrite(memref::StoreOp storeOp, OpAdaptor adaptor,
10331034

10341035
auto [memoryAccess, alignment] = *memoryRequirements;
10351036
rewriter.replaceOpWithNewOp<spirv::StoreOp>(
1036-
storeOp, storePtr, adaptor.getValue(), memoryAccess, alignment);
1037+
storeOp, storePtr, adaptor.getValueToStore(), memoryAccess, alignment);
10371038
return success();
10381039
}
10391040

mlir/lib/Dialect/MemRef/Transforms/EmulateNarrowType.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -426,7 +426,7 @@ struct ConvertMemrefStore final : OpConversionPattern<memref::StoreOp> {
426426
Location loc = op.getLoc();
427427

428428
// Pad the input value with 0s on the left.
429-
Value input = adaptor.getValue();
429+
Value input = adaptor.getValueToStore();
430430
if (!input.getType().isInteger()) {
431431
input = arith::BitcastOp::create(
432432
rewriter, loc,

mlir/lib/Dialect/MemRef/Transforms/EmulateWideInt.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -90,7 +90,7 @@ struct ConvertMemRefStore final : OpConversionPattern<memref::StoreOp> {
9090
op.getMemRefType()));
9191

9292
rewriter.replaceOpWithNewOp<memref::StoreOp>(
93-
op, adaptor.getValue(), adaptor.getBase(), adaptor.getIndices(),
93+
op, adaptor.getValueToStore(), adaptor.getBase(), adaptor.getIndices(),
9494
op.getNontemporal());
9595
return success();
9696
}

mlir/test/python/dialects/openacc.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -122,7 +122,7 @@ def testParallelMemcpy():
122122
with InsertionPoint(loop_block):
123123
idx = arith.index_cast(out=IndexType.get(), in_=loop_block.arguments[0])
124124
val = memref.load(base=copied, indices=[idx])
125-
memref.store(value=val, base=created, indices=[idx])
125+
memref.store(value_to_store=val, base=created, indices=[idx])
126126
openacc.YieldOp([])
127127

128128
openacc.YieldOp([])

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